;Output : Analog output from Ain0 @ AOut
; Digital output from AIn1 @ PA
; from AIn2 @ PB
; from AIn3 @ PC
;---------------------------------------
CSEG
ORG 4000H
LJMP Start
ORG 4100H
$NOLIST
$INCLUDE(ADDA.ASM)
$LIST
Delay: PUSH 02H
PUSH 03H
MOV R2,#0FFH
Del: MOV R3,#0FFH
DJNZ R3,$
DJNZ R2,Del
POP 03H
POP 02H
RET
Start: MOV P1,#0FFH
MOV SP,#40H
MOV Flag,#00H
MOV Ch0,#00H
MOV Ch1,#00H
MOV Ch2,#00H
MOV Ch3,#00H
ACALL Delay ;Init PPI8255
MOV DPTR,#2003H
MOV A,#80H
MOVX @DPTR,A
MOV A,#00H ;Slave Addr=0
MOV Mode,#0 ;Mode=0
MOV Channel,#2 ;Ch=2
SETB AutoInc
LCALL InitADDA
JB InitDone,NxtStep
CLR P1.0 ;Indicate init fail
AJMP $
NxtStep: MOV A,#00H ;Slave Addr=0
LCALL ReadADC ;Read Ain0-Ain3
;Data ADC ready to use
;in Ch0-Ch3
MOV A,#00H ;Slave Addr=0
MOV B,Ch0 ;
LCALL WriteDAC ;Output @ AOut
MOV A,Ch1 ;Output Ain1 @ PA
MOV DPTR,#2000H
MOVX @DPTR,A
MOV A,Ch2 ;Output Ain2 @ PB
MOV DPTR,#2001H
MOVX @DPTR,A
MOV A,Ch3 ;Output Ain3 @ PC
MOV DPTR,#2002H
MOVX @DPTR,A
AJMP $
END
By Benget Elektro UKI
